Chip Design Flow in VLSI Industry

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Original price was: ₹6,000.00.Current price is: ₹2,000.00.

Letter	Internship Offer Letter
Certificate	Internship Certificate

Chip Design Flow in VLSI Industry

EdProSkills

Category: Electronics

3962

Description

Introduction to CHIP Design & Fabrication Flow
1. Overview of VLSI Industry
2. Career Opportunities in VLSI Industry
3. Chip Design Flows in VLSI Industry
  1. Application Specific Instruction Flow (ASIC) Flow
  2. System-On-Chip SoC Design Flow
  3. Analog-Mixed Signal (AMS) IC Design Flow
  4. FPGA Design Flow
4. Overview of IC Fabrication Flow
ASIC Flow in VLSI Industry
1. Front End Design Flow
  1. RTL Design Flow
  2. Overview on Quality checks in VLSI Industry
    - CDC, Lint, LEC & Low power Checks
    - RTL Synthesis for Netlist Generation
    - Timing Analysis
  3. Design Verification
  4. DFT & BIST
2. Physical Design Flow
  1. Floor Planning
  2. Standard Cell Placement and Route
  3. Clock Tree synthesis (CTS)
  4. Layout & GDS-II file generation
FPGA Flow in VLSI Industry
1. FPGA Overview
2. FPGA Architecture – Evolution
3. FPGA Flow Overview
4. High Level Synthesis Using FPGA
5. Reconfigurable Computing
RTL Design using System Verilog HDL
1. HDL Overview
  1. Importance of HDL & Evolution of HDL in Chip Design
  2. How HDLs are better than Software Programming Languages
2. VLSI Industry Migration from Verilog to System Verilog (SV)
3. SV Operators
4. SV Data Types
5. Functions & Tasks in SV
6. Loops & Arrays in SV
7. Classes in SV
8. Object Oriented Programming in SV
9. Interfaces
10. Design Verification using SV

Chip Design Flow in VLSI Industry

Description

Original price was: ₹6,000.00.Current price is: ₹2,000.00.

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