Chip Design Flow in VLSI Industry

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  • Duration: 1 Month
  • Mode: Online
  • Internship Certificate: Yes
  • Internship Fee: ₹ 999
  • Start Date: April 2025

Course Content

  1. Introduction to CHIP Design & Fabrication Flow
    • Overview of VLSI Industry
    • Career Opportunities in VLSI Industry
    • Chip Design Flows in VLSI Industry
    • Overview of IC Fabrication Flow
  2. ASIC Flow in VLSI Industry
    • Front End Design Flow
      • RTL Design Flow
      • Overview on Quality checks in VLSI Industry
      • Design Verification
      • DFT & BIST
    • Physical Design Flow
      • Floor Planning
      • Standard Cell Placement and Route
      • Clock Tree synthesis (CTS)
      • Layout & GDS-II file generation
  3. FPGA Flow in VLSI Industry
    • FPGA Overview
    • FPGA Architecture – Evolution
    • FPGA Flow Overview
    • High Level Synthesis Using FPGA
    • Reconfigurable Computing
  4. RTL Design using System Verilog HDL
    • HDL Overview
    • SV Operators
    • SV Data Types
    • Functions & Tasks in SV
    • Loops & Arrays in SV
    • Classes in SV
    • Object Oriented Programming in SV
    • Interfaces
    • Design Verification using SV
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